1. Field of the Invention
The present invention relates to an object, a method, or a manufacturing method. Further, the present invention relates to a process, a machine, manufacture, or a composition of matter. For example, in this specification, a semiconductor device, a display device, a power storage device, driving methods thereof, and manufacturing methods thereof are described. In this specification, as the semiconductor device, for example, a memory circuit, a processor including a memory circuit (typically, a programmable logic device, a CPU, or a microcontroller), and an electronic device including the processor are described.
Note that in this specification, a semiconductor device means a device including a circuit having a semiconductor element (e.g., a transistor or a diode). Alternatively, the semiconductor device means any device that can function by utilizing semiconductor characteristics. For example, an integrated circuit, a chip including an integrated circuit, a display device, a light-emitting device, and an electronic device are included in a semiconductor device or include a semiconductor device in some cases.
2. Description of the Related Art
Signal processing units such as central processing units (CPUs) vary in structure depending on the intended use. A signal processing unit generally has main memory for storing data or programs and other memory circuits such as a register and cache memory. A register has a function of temporarily maintaining a data signal for holding arithmetic processing or a program execution state, for example. Meanwhile, cache memory is located between an arithmetic unit and main memory in order to reduce access to the slow main memory and speed up arithmetic processing.
In a memory circuit such as a register or cache memory in a signal processing unit, writing of a data signal needs to be performed at higher speed than in main memory. Thus, in general, a flip-flop is used as a register, and static random access memory (SRAM) or the like is used as cache memory. In other words, such a register, cache memory, or the like is a volatile memory circuit, which loses a data signal after the application of power supply voltage is stopped.
There has been suggested a method for reducing power consumption by temporarily stopping the application of power supply voltage to a signal processing unit in a period during which a data signal is not input or output (e.g., see Patent Document 1). With the method in Patent Document 1, a nonvolatile memory circuit is located around a volatile memory circuit such as a register or cache memory, and the data signal is temporarily stored in the nonvolatile memory circuit. Thus, in the signal processing unit, the data signal stored in the register, the cache memory, or the like can be held even while the application of power supply voltage is stopped.
When the application of power supply voltage to a signal processing unit is stopped for a long time, a data signal in a volatile memory circuit is transferred to an external memory circuit such as a hard disk or flash memory before the application of power supply voltage is stopped, so that the data signal can be prevented from being lost.
However, the method in which a data signal that has been held in a volatile memory circuit is stored in a nonvolatile memory circuit located around the volatile memory circuit while the application of power supply voltage to a signal processing unit is stopped involves a complicated process of manufacturing the signal processing unit. This is because a magnetic element or a ferroelectric is mainly used for the nonvolatile memory circuit.
With the method in which a data signal that has been held in a volatile memory circuit is stored in an external memory circuit while the application of power supply voltage to a signal processing unit is stopped, it takes a long time to send back the data signal from the external memory circuit to the volatile memory circuit. Thus, backing up a data signal to an external memory circuit is not suitable for the case where the application of power supply voltage is stopped for a short time, during which a data signal is not input or output, in order to reduce power consumption.
In view of the above, Patent Document 2 suggests a memory device 140 (FIG. 9) in which a transistor whose off leakage current is extremely low (e.g., a transistor using an oxide semiconductor for a channel formation region) and a storage capacitor are used instead of the above nonvolatile memory circuit. The memory device 140 in FIG. 9 includes a memory circuit 121 including a transistor in which a channel formation region is formed in silicon (hereinafter referred to as Si transistor), a selection circuit 136 including a Si transistor, a transistor 101 in which an oxide semiconductor is used for a channel formation region (such a transistor is hereinafter referred to as OS transistor), and a storage capacitor 102. The memory device 140 is configured to hold a signal stored in the storage capacitor 102 during power interruption by utilizing the fact that the off leakage current of the OS transistor 101 is extremely low.
By employing this structure, it is possible to provide a memory device that does not need a complicated manufacturing process and has lower power consumption, and specifically a memory device that can reduce power consumption by stopping the application of power supply voltage even for a short time. Such a memory device has the advantage of no performance degradation due to data rewriting because it uses the OS transistor and the storage capacitor instead of a nonvolatile memory circuit.